Editing User:Sharan.nyn/GSoC18/Log
From BRL-CAD
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
Latest revision | Your text | ||
Line 160: | Line 160: | ||
* 10/06/18 | * 10/06/18 | ||
− | ** Fixed a bug with check_overlaps and rtcheck allocation of memory for region names. committed - | + | ** Fixed a bug with check_overlaps and rtcheck allocation of memory for region names. committed - r71063 |
** compared the outputs of old rtcheck program and new rtcheck program. | ** compared the outputs of old rtcheck program and new rtcheck program. | ||
*** got it to match finally after small tweaks | *** got it to match finally after small tweaks | ||
Line 466: | Line 466: | ||
* 10/08/18 | * 10/08/18 | ||
** Start work on the final project report. | ** Start work on the final project report. | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− |